gba.inc

File: gba.inc - Tab length: 1 2 4 8 - Lines: on off - No wrap: on off

001: @@@@@@@@@ CONTENTS @@@@@@@@@
002: @ 1. Key pad defines
003: @ 2. Display
004: @ 3. Sprites
005: @ 4. Background
006: @ 5. Sound
007: @ 6. DMA
008: @ 7. Interrupts
009: @ 8. BIOS Functions
010: @ 9. Timers
011:
012: @@@@@@@@@ 1. KEY PAD DEFINES @@@@@@@@@
013: KEY_A = 1
014: KEY_B = 2
015: KEY_SELECT = 4
016: KEY_START = 8
017: KEY_RIGHT = 16
018: KEY_LEFT = 32
019: KEY_UP = 64
020: KEY_DOWN = 128
021: KEY_R = 256
022: KEY_L = 512
023: KEYS = 0x04000130
024: KEYS_HIGH = 0x04000000
025: KEYS_LOW = 0x00000130
026:
027: @@@@@@@@@ 2. Display @@@@@@@@@
028: @ Tile modes
029: MODE_0 = 0x00 @ All 4 BG layers available, but no rotation/scaling
030: MODE_1 = 0x01 @ 3 BG layers (0-2), BG2 can rotate/scale
031: MODE_2 = 0x02 @ 2 BG layers (2-3), both can scale/rotate
032: @ Bitmap modes : BG2 only
033: MODE_3 = 0x03 @ 16 bit color bitmap, cuts into available sprite data area
034: MODE_4 = 0x04 @ Like Mode 3, but with 8-bit references (and palette)
035: MODE_5 = 0x05 @ 16 bit color bitmap, with backbuffer. Screen limited to 160x128
036:
037: BACKBUFFER = 0x010
038: H_BLANK_OAM = 0x020
039:
040: OBJ_MAP_2D = 0x000
041: OBJ_MAP_1D = 0x040
042:
043: FORCE_BLANK = 0x080
044:
045: BG0_ENABLE = 0x0100
046: BG1_ENABLE = 0x0200
047: BG2_ENABLE = 0x0400
048: BG3_ENABLE = 0x0800
049: OBJ_ENABLE = 0x01000 @ = SPRITES_ENABLE: enable sprites
050: WIN1_ENABLE = 0x02000
051: WIN2_ENABLE = 0x04000
052: WINOBJ_ENABLE = 0x08000
053: VRAM = 0x06000000
054: VPAL = 0x05000000
055: REG_DISPCNT = 0x04000000 @
056: REG_BASE = REG_DISPCNT
057: REG_VCOUNT = 0x04000006
058:
059: REG_BLDMOD = 0x04000050
060: BLEND_BG0S = 0x01 @ Source
061: BLEND_BG1S = 0x02
062: BLEND_BG2S = 0x04
063: BLEND_BG3S = 0x08
064: BLEND_SRITES= 0x10
065: BLEND_BD = 0x20 @ Blend backdrop
066: BLEND_ALPHA = 0b01000000
067: BLEND_LIGHT = 0b10000000
068: BLEND_DARK = 0b11000000
069: BLEND_BG0T = 0x0100 @ Target
070: BLEND_BG1T = 0x0200
071: BLEND_BG2T = 0x0400
072: BLEND_BG3T = 0x0800
073:
074: REG_COLEV = 0x4000052
075: REG_COLEY = 0x4000054
076:
077: @@@@@@@@@ 3. SPRITES @@@@@@@@@
078:
079: @*** Attribute 0 ***
080: @ F E D C B A 9 8 7 6 5 4 3 2 1 0
081: @ S S A M T T D R J J J J J J J J
082: @ 0-7 (J) = Y coordinate of the sprite (pixels)
083: @ 8 (R) = Rotation/Scaling on/off
084: @ 9 (D) = 0 - sprite is single sized;
085: @ 1 - sprite is virtually double sized
086: @ A-B (T) = 00 - normal
087: @ 01 - semi-transparent
088: @ 10 - obj window
089: @ C (M) = enables mosaic for this sprite.
090: @ D (A) = 256 color if on, 16 color if off
091: @ E-F (S) = Size, MSB in attribute 0, LSB in attribute 1
092:
093: @ Byte 1 = Y coordinate of the sprite, in pixels
094: @ Byte 2
095: ROTATION_FLAG = 0x100
096: SIZE_DOUBLE = 0x200
097: MODE_NORMAL = 0x000
098: MODE_TRANSPERANT= 0x400
099: MODE_WINDOWED = 0x800
100: MOSAIC = 0x1000
101: COLOR_16 = 0x0000
102: COLOR_256 = 0x2000
103: SIZE_8 = 0x0000 @ Only valid for SQUARE
104: SIZE_16 = 0x4000
105: SIZE_32 = 0x8000
106: SIZE_64 = 0xC000
107:
108: @*** Atribute 1 ***
109: @ FEDC BA98 7654 3210
110: @ SSVH XXXI IIII IIII (standard sprites)
111: @ SSFF FFFI IIII IIII (rotation/scaling on)
112: @ 0-8 (I) = X coordinate of the sprite (pixels)
113: @ C (H) = flip horizinal bit
114: @ D (V) = flip vertical bit
115: @ 9-D (F) = rotation index (0-31). rotation/scaling data in OAM attribute 3
116: @ E-F (S) = Size of the sprite (LSB)
117: @ 4-bit value which sets the size of the sprite in the following way:
118: @ 00 00: 8 x 8 10 00: 8 x 16
119: @ 00 01: 16 x 16 10 01: 8 x 32
120: @ 00 10: 32 x 32 10 10: 16 x 32
121: @ 00 11: 64 x 64 10 11: 32 x 64
122: @ 01 00: 16 x 8 11 00: Not used
123: @ 01 01: 32 x 8 11 01: Not used
124: @ 01 10: 32 x 16 11 10: Not used
125: @ 01 11: 64 x 32 11 11: Not used
126:
127: @ Byte 3+1 bit = X coordinate of the sprite, in pixels (9-bit value)
128: @ Byte 4
129: SQUARE = 0x0000
130: WIDE = 0x4000
131: TALL = 0x8000
132: HORIZONTAL_FLIP = 0x1000
133: VERTICAL_FLIP = 0x2000
134: OAM = 0x07000000
135: OBJPAL = 0x5000200
136: CHARMEM = 0x6010000 @ SPRITE MEM
137: CHARMEM_MODE3 = 0x6012BFD
138:
139: @*** Attribute 2 ***
140: @ FEDC BA98 7654 3210
141: @ LLLL PPTT TTTT TTTT
142: @
143: @ 0-9 (T) = Tile number
144: @ A-B (P) = Priority. Note thate sprites take precedence over backgrounds of the same priority.
145: @ C-F (L) = Palette number (16 color only)
146:
147: SPRITE_P0 = 0x0000 @ Priority 0
148: SPRITE_P1 = 0x0004 @ Priority 1
149: SPRITE_P2 = 0x0008
150: SPRITE_P3 = 0x000C
151:
152: @@@@@@@@@ 4. Background @@@@@@@@@
153: @ These four addresses handle the BG layers
154: REG_BG0CNT = 0x4000008
155: REG_BG1CNT = 0x400000A
156: REG_BG2CNT = 0x400000C
157: REG_BG3CNT = 0x400000E
158:
159: REG_BG0HOFS = 0x4000010 @ Horizontal offset
160: REG_BG0VOFS = 0x4000012 @ Vertical offset
161: REG_BG1HOFS = 0x4000014
162: REG_BG1VOFS = 0x4000016
163: REG_BG2HOFS = 0x4000018
164: REG_BG2VOFS = 0x400001A
165: REG_BG3HOFS = 0x400001C
166: REG_BG3VOFS = 0x400001E
167: REG_BG2PA = 0x4000020
168: REG_BG2PB = 0x4000022
169: REG_BG2PC = 0x4000024
170: REG_BG2PD = 0x4000026
171: REG_BG2X = 0x4000028
172: REG_BG2X_L = 0x4000028
173: REG_BG2X_H = 0x400002A
174: REG_BG2Y = 0x400002C
175: REG_BG2Y_L = 0x400002C
176: REG_BG2Y_H = 0x400002E
177: REG_BG3PA = 0x4000030
178: REG_BG3PB = 0x4000032
179: REG_BG3PC = 0x4000034
180: REG_BG3PD = 0x4000036
181: REG_BG3X = 0x4000038
182: REG_BG3X_L = 0x4000038
183: REG_BG3X_H = 0x400003A
184: REG_BG3Y = 0x400003C
185: REG_BG3Y_L = 0x400003C
186: REG_BG3Y_H = 0x400003E
187:
188: BG_COLOR_16 = 0x0
189: BG_MOSAIC_ENABLE = 0x40
190: BG_COLOR_256 = 0x80
191:
192: TEXTBG_SIZE_256x256 = 0x0 @ 16x16 8*8 for text backgrounds
193: TEXTBG_SIZE_512x256 = 0x4000 @ 64x32
194: TEXTBG_SIZE_256x512 = 0x8000 @ 32x64
195: TEXTBG_SIZE_512x512 = 0xC000 @ 64x64
196:
197: ROTBG_SIZE_128x128 = 0x0 @ 16x16 8*8 tiles for rotational backgrounds
198: ROTBG_SIZE_256x256 = 0x4000 @ 32x32 tiles
199: ROTBG_SIZE_512x512 = 0x8000 @ 64x64 tiles
200: ROTBG_SIZE_1024x1024 = 0xC000 @ 128x128 tiles
201:
202: BG_P0 = 0 @ Priority 0 (front/top)
203: BG_P1 = 1 @ Priority 1
204: BG_P2 = 2
205: BG_P3 = 3 @ Priority 3 (back/bottom)
206:
207: WRAPAROUND = 0x2000
208:
209: CHAR_SHIFT = 2 @ Used to shift the number over to the right place in REG_BGxCNT
210: SCREEN_SHIFT = 8
211:
212: @ Defines for all 32 screen (map data) blocks and 4 character (bitmap data) blocks
213: @ Some of this might not be correct
214: CHAR_BLOCK_0 = 0x6000000 @ Note: this just happens to be the same address as VRAM
215: CHAR_BLOCK_1 = 0x6004000
216: CHAR_BLOCK_2 = 0x6008000
217: CHAR_BLOCK_3 = 0x600C000
218: SCREEN_BLOCK_0 = 0x6000000
219: SCREEN_BLOCK_1 = 0x6000800
220: SCREEN_BLOCK_2 = 0x6001000
221: SCREEN_BLOCK_3 = 0x6001800
222: SCREEN_BLOCK_4 = 0x6002000
223: SCREEN_BLOCK_5 = 0x6002800
224: SCREEN_BLOCK_6 = 0x6003000
225: SCREEN_BLOCK_7 = 0x6003800
226: SCREEN_BLOCK_8 = 0x6004000
227: SCREEN_BLOCK_9 = 0x6004800
228: SCREEN_BLOCK_10 = 0x6005000
229: SCREEN_BLOCK_11 = 0x6005800
230: SCREEN_BLOCK_12 = 0x6006000
231: SCREEN_BLOCK_13 = 0x6006800
232: SCREEN_BLOCK_14 = 0x6007000
233: SCREEN_BLOCK_15 = 0x6007800
234: SCREEN_BLOCK_16 = 0x6008000
235: SCREEN_BLOCK_17 = 0x6008800
236: SCREEN_BLOCK_18 = 0x6009000
237: SCREEN_BLOCK_19 = 0x6009800
238: SCREEN_BLOCK_20 = 0x600A000
239: SCREEN_BLOCK_21 = 0x600A800
240: SCREEN_BLOCK_22 = 0x600B000
241: SCREEN_BLOCK_23 = 0x600B800
242: SCREEN_BLOCK_24 = 0x600C000
243: SCREEN_BLOCK_25 = 0x600C800
244: SCREEN_BLOCK_26 = 0x600D000
245: SCREEN_BLOCK_27 = 0x600D800
246: SCREEN_BLOCK_28 = 0x600E000
247: SCREEN_BLOCK_29 = 0x600E800
248: SCREEN_BLOCK_30 = 0x600F000
249: SCREEN_BLOCK_31 = 0x600F800
250:
251: @@@@@@@@@ 5. Sound @@@@@@@@@
252: @ To turn sound on:
253: @ ldr r1,=REG_SOUNDCNT_X
254: @ ldr r0,=0x0081
255: @ str r0,[r1]
256:
257: REG_SOUND1CNT_L = 0x04000060 @ Sound 1 Sweep control
258: REG_SOUND1CNT_H = 0x04000062 @ Sound 1 Length, wave duty and envelope control
259: REG_SOUND1CNT_X = 0x04000064 @ Sound 1 Frequency, reset and loop control
260: REG_SOUND2CNT_L = 0x04000068 @ Sound 2 Length, wave duty and envelope control
261: REG_SOUND2CNT_H = 0x0400006C @ Sound 2 Frequency, reset and loop control
262: REG_SOUND3CNT_L = 0x04000070 @ Sound 3 Enable and wave ram bank control
263: REG_SOUND3CNT_H = 0x04000072 @ Sound 3 Sound Length and output level control
264: REG_SOUND3CNT_X = 0x04000074 @ Sound 3 Frequency, reset and loop control
265: REG_SOUND4CNT_L = 0x04000078 @ Sound 4 Length, output level and envelope control
266: REG_SOUND4CNT_H = 0x0400007C @ Sound 4 Noise parameters, reset and loop control
267: REG_SOUNDCNT_L = 0x04000080 @ Sound 1-4 Output level and Stereo control
268: REG_SOUNDCNT_H = 0x04000082 @ Direct Sound control and Sound 1-4 output ratio
269: REG_SOUNDCNT_X = 0x04000084 @ Master sound enable and Sound 1-4 play status
270: REG_SOUNDBIAS = 0x04000088 @ Sound bias and Amplitude resolution control
271: REG_WAVE_RAM0_L = 0x04000090 @ Sound 3 samples 0-3
272: REG_WAVE_RAM0_H = 0x04000092 @ Sound 3 samples 4-7
273: REG_WAVE_RAM1_L = 0x04000094 @ Sound 3 samples 8-11
274: REG_WAVE_RAM1_H = 0x04000096 @ Sound 3 samples 12-15
275: REG_WAVE_RAM2_L = 0x04000098 @ Sound 3 samples 16-19
276: REG_WAVE_RAM2_H = 0x0400009A @ Sound 3 samples 20-23
277: REG_WAVE_RAM3_L = 0x0400009C @ Sound 3 samples 23-27
278: REG_WAVE_RAM3_H = 0x0400009E @ Sound 3 samples 28-31
279: REG_FIFO_A_L = 0x040000A0 @ Direct Sound channel A samples 0-1
280: REG_FIFO_A_H = 0x040000A2 @ Direct Sound channel A samples 2-3
281: REG_FIFO_B_L = 0x040000A4 @ Direct Sound channel B samples 0-1
282: REG_FIFO_B_H = 0x040000A6 @ Direct Sound channel B samples 2-3
283:
284: @@@@@@@@@ 6. DMA @@@@@@@@@
285:
286: DMA_ENABLE = 0x80000000
287: DMA_INTERUPT_ENABLE = 0x40000000
288: DMA_TIMING_IMMEDIATE= 0x00000000
289: DMA_TIMING_VBLANK = 0x10000000
290: DMA_TIMING_HBLANK = 0x20000000
291: DMA_TIMING_SYNC_TO_DISPLAY = 0x30000000
292: DMA_16 = 0x00000000
293: DMA_32 = 0x04000000
294: DMA_REPEAT = 0x02000000
295: DMA_SOURCE_INCREMENT= 0x00000000
296: DMA_SOURCE_DECREMENT= 0x00800000
297: DMA_SOURCE_FIXED = 0x01000000
298: DMA_DEST_INCREMENT = 0x00000000
299: DMA_DEST_DECREMENT = 0x00200000
300: DMA_DEST_FIXED = 0x00400000
301: DMA_DEST_RELOAD = 0x00600000
302:
303: @ register defines, ripped from GBA.h from DevKitAdvanced
304: REG_DMA0SAD = 0x40000B0
305: REG_DMA0SAD_L = 0x40000B0
306: REG_DMA0SAD_H = 0x40000B2
307: REG_DMA0DAD = 0x40000B4
308: REG_DMA0DAD_L = 0x40000B4
309: REG_DMA0DAD_H = 0x40000B6
310: REG_DMA0CNT = 0x40000B8
311: REG_DMA0CNT_L = 0x40000B8
312: REG_DMA0CNT_H = 0x40000BA
313: REG_DMA1SAD = 0x40000BC
314: REG_DMA1SAD_L = 0x40000BC
315: REG_DMA1SAD_H = 0x40000BE
316: REG_DMA1DAD = 0x40000C0
317: REG_DMA1DAD_L = 0x40000C0
318: REG_DMA1DAD_H = 0x40000C2
319: REG_DMA1CNT = 0x40000C4
320: REG_DMA1CNT_L = 0x40000C4
321: REG_DMA1CNT_H = 0x40000C6
322: REG_DMA2SAD = 0x40000C8
323: REG_DMA2SAD_L = 0x40000C8
324: REG_DMA2SAD_H = 0x40000CA
325: REG_DMA2DAD = 0x40000CC
326: REG_DMA2DAD_L = 0x40000CC
327: REG_DMA2DAD_H = 0x40000CE
328: REG_DMA2CNT = 0x40000D0
329: REG_DMA2CNT_L = 0x40000D0
330: REG_DMA2CNT_H = 0x40000D2
331: REG_DMA3SAD = 0x40000D4
332: REG_DMA3SAD_L = 0x40000D4
333: REG_DMA3SAD_H = 0x40000D6
334: REG_DMA3DAD = 0x40000D8
335: REG_DMA3DAD_L = 0x40000D8
336: REG_DMA3DAD_H = 0x40000DA
337: REG_DMA3CNT = 0x40000DC
338: REG_DMA3CNT_L = 0x40000DC
339: REG_DMA3CNT_H = 0x40000DE
340:
341: @ These defines group common options to save typing
342: @ You may notice that I don't have to include the option to increment the source and address register as that is the default.
343: @ DMA_32NOW DMA_ENABLE|DMA_TIMEING_IMMEDIATE|DMA_32
344: @ DMA_16NOW DMA_ENABLE|DMA_TIMEING_IMMEDIATE|DMA_16
345: DMA_32NOW = 0x84000000
346: DMA_16NOW = 0x80000000
347:
348: @@@@@@@@@ 7. INTERRUPTS @@@@@@@@@
349:
350: INT_VBLANK = 0x0001
351: INT_HBLANK = 0x0002
352: INT_VCOUNT = 0x0004 @ you can set the display to generate an interrupt when it reaches a particular line on the screen
353: INT_TIMER0 = 0x0008
354: INT_TIMER1 = 0x0010
355: INT_TIMER2 = 0x0020
356: INT_TIMER3 = 0x0040
357: INT_COMUNICATION = 0x0080 @ Serial communication interupt
358: INT_DMA0 = 0x0100
359: INT_DMA1 = 0x0200
360: INT_DMA2 = 0x0400
361: INT_DMA3 = 0x0800
362: INT_KEYBOARD = 0x1000
363: INT_CART = 0x2000 @ The cart can actually generate an interupt
364:
365: INT_ENABLE = 0x1
366:
367: @ "_OFF" suffix is added to calculate the offset from REG_BASE aka REG_DISPCNT (0x0400:0000)
368: REG_INTADDR = 0x3007FFC
369: REG_INTADDR_OFF = -0x04
370:
371: REG_INT_OFF = 0x0200 @ Offset from REG_BASE (REG_DISPCNT) to start of interrupt registers
372: REG_IE = 0x4000200 @ Interrupt Enable Register (note: REG_IE and REG_IF can fit in one register ;))
373: REG_IE_OFF = 0x00 @ Offset from REG_IE (interrupt base)
374: REG_IF = 0x4000202
375: REG_IF_OFF = 0x02 @ Offset from REG_IE
376: REG_IME = 0x4000208 @ Interrupt Master Enable Register
377: REG_IME_OFF = 0x08 @ bit 0 = Enable interupts (1)/Disable all interrupts (0)
378:   @ if 1, it will look in REG_IE for interrupt type
379: REG_DISPSTAT = 0x4000004 @ Display Status:
380: REG_DISPSTAT_OFF= 0x04 @ Offset from REG_BASE
381: STAT_VBLANK = 1 @ bit 0 = V Refresh (0 = VDraw, 1 = VBlank)
382: STAT_HBLANK = 2 @ bit 1 = H Refresh (0 = HDraw, 1 = HBlank)
383:   @ bit 2 = VCount Triggered Status (1 = Y trigger interrupt occured)
384: STAT_VBLANK_IRQ = 8 @ bit 3 = Enables LCD VBlank IRQ
385: STAT_HBLANK_IRQ = 16 @ bit 4 = Enables LCD HBlank IRQ
386:   @ bit 5 = Enables VCount trigger
387:   @ bit 8-F = VCount line trigger: Vcount value you wish to trigger an interrupt
388:
389: @@@@@@@@@ 8. BIOS FUNCTIONS @@@@@@@@@
390:
391: #IFDEF ARM
392: _SoftReset = 0x000000
393: _RegisterRamReset = 0x010000
394: _Halt = 0x020000
395: _Stop_Sleep = 0x030000
396: _IntrWait = 0x040000
397: _VBlankIntrWait = 0x050000
398: _Div = 0x060000
399: _DivArm = 0x070000
400: _Sqrt = 0x080000
401: _ArcTan = 0x090000
402: _ArcTan2 = 0x0A0000
403: _CpuSet = 0x0B0000
404: _CpuFastSet = 0x0C0000
405: _GetBiosChecksum = 0x0D0000
406: _BgAffineSet = 0x0E0000
407: _ObjAffineSet = 0x0F0000
408: _BitUnPack = 0x100000
409: _LZ77UnCompWram = 0x110000
410: _LZ77UnCompVram = 0x120000
411: _HuffUnComp = 0x130000
412: _RLUnCompWram = 0x140000
413: _RLUnCompVram = 0x150000
414: _Diff8bitUnFilterWram = 0x160000
415: _Diff8bitUnFilterVram = 0x170000
416: _Diff16bitUnFilter = 0x180000
417: _SoundBias = 0x190000
418: _SoundDriverInit = 0x1A0000
419: _SoundDriverMode = 0x1B0000
420: _SoundDriverMain = 0x1C0000
421: _SoundDriverVSync = 0x1D0000
422: _SoundChannelClear = 0x1E0000
423: _MidiKey2Freq = 0x1F0000
424: _SoundWhatever0 = 0x200000
425: _SoundWhatever1 = 0x210000
426: _SoundWhatever2 = 0x220000
427: _SoundWhatever3 = 0x230000
428: _SoundWhatever4 = 0x240000
429: _MultiBoot = 0x250000
430: _HardReset = 0x260000
431: _CustomHalt = 0x270000
432: _SoundDriverVSyncOff = 0x280000
433: _SoundDriverVSyncOn = 0x290000
434: _SoundGetJumpList = 0x2A0000
435: #ELSE
436: _SoftReset = 0x00
437: _RegisterRamReset = 0x01
438: _Halt = 0x02
439: _Stop_Sleep = 0x03
440: _IntrWait = 0x04
441: _VBlankIntrWait = 0x05
442: _Div = 0x06
443: _DivArm = 0x07
444: _Sqrt = 0x08
445: _ArcTan = 0x09
446: _ArcTan2 = 0x0A
447: _CpuSet = 0x0B
448: _CpuFastSet = 0x0C
449: _GetBiosChecksum = 0x0D
450: _BgAffineSet = 0x0E
451: _ObjAffineSet = 0x0F
452: _BitUnPack = 0x10
453: _LZ77UnCompWram = 0x11
454: _LZ77UnCompVram = 0x12
455: _HuffUnComp = 0x13
456: _RLUnCompWram = 0x14
457: _RLUnCompVram = 0x15
458: _Diff8bitUnFilterWram = 0x16
459: _Diff8bitUnFilterVram = 0x17
460: _Diff16bitUnFilter = 0x18
461: _SoundBias = 0x19
462: _SoundDriverInit = 0x1A
463: _SoundDriverMode = 0x1B
464: _SoundDriverMain = 0x1C
465: _SoundDriverVSync = 0x1D
466: _SoundChannelClear = 0x1E
467: _MidiKey2Freq = 0x1F
468: _SoundWhatever0 = 0x20
469: _SoundWhatever1 = 0x21
470: _SoundWhatever2 = 0x22
471: _SoundWhatever3 = 0x23
472: _SoundWhatever4 = 0x24
473: _MultiBoot = 0x25
474: _HardReset = 0x26
475: _CustomHalt = 0x27
476: _SoundDriverVSyncOff = 0x28
477: _SoundDriverVSyncOn = 0x29
478: _SoundGetJumpList = 0x2A
479: #ENDIF
480:
481: @@@@@@@@@ 9. TIMERS @@@@@@@@@
482: @ There are four timers, TM0-3.
483: @ Timers 0 and 1 are used to control the rate of Direct Sound FIFO (first in first out)
484: REG_TM0D = 0x4000100 @ Data, holds current value of timer (2-byte number, 0-65535)
485: REG_TM0CNT = 0x4000102 @ Controller
486: REG_TM1D = 0x4000104
487: REG_TM1CNT = 0x4000106
488: REG_TM2D = 0x4000108
489: REG_TM2CNT = 0x400010A
490: REG_TM3D = 0x400010C
491: REG_TM3CNT = 0x400010E
492: @ Controller values
493: TIME_FREQUENCY_SYSTEM = 0x0 @ Bits 0-1 = timer speed
494: TIME_FREQUENCY_64 = 0x1
495: TIME_FREQUENCY_256 = 0x2
496: TIME_FREQUENCY_1024 = 0x3
497: TIME_OVERFLOW = 0x4 @ Bit 2
498: TIME_IRQ_ENABLE = 0x40 @ Bit 6: Generate interrupt on overflow
499: TIME_ENABLE = 0x80 @ Bit 7: Enable